Data transmission systems such as, e.g., SONET/SDH, require that the system clock be complied with very precisely. Fluctuations in the system clock, if they exceed a permissible tolerance threshold, may lead to incorrect assessments of the received signal and thus initiate a bit error.
Real clock generators are always subjected to such fluctuations. In this case, fluctuations may affect not only the clock frequency but also the phases of the rising edges or of the falling edges. In this case, by way of example, the edge of the clock signal sometimes occurs somewhat earlier and sometimes occurs somewhat later. This behavior is referred to as jitter. The following definition for jitter is used hereinafter.
Jitter denotes the periodic and stochastic deviations of the core instants of a digital signal relative to their ideal, equidistant core instants. The core instant of a digital signal may be any customary, easily identifiable point of the signal, such as, e.g., the rising or falling edge or the sampling instant. Consideration is given for example to a square-wave clock signal
            u      ⁡              (        t        )              =          square      ⁢                          ⁢              (                              f            1                    ⁢          t                )                        where      ⁢                          ⁢      square      ⁢                          ⁢              (        x        )              =          {                                                                                                                                                      1                        ⁢                                                                                                  ⁢                        for                        ⁢                                                                                                  ⁢                        0                                            ≤                      x                      <                      0                                        ,                    5                                                                                                                                          0                      ⁢                                                                                          ⁢                      for                      ⁢                                                                                          ⁢                      0.5                                        ≤                    x                    <                    1                                                                        ⁢                                                  ⁢            and            ⁢                                                  ⁢            square            ⁢                                                  ⁢                          (              x              )                                =                      square            ⁢                                                  ⁢                          (                              x                +                n                            )                                      ,                                  ⁢        n        ,                  integer          .                    
This square-wave clock signal is then acted upon by a periodic jitter signal wherej(t)=β*sin(2πfjt+Φ)
This produces a signal subjected to jitter whereu(t)=square(f1t+β sin(2πfjt+Φ)).
In this case, β emits the jitter amplitude, fj indicates the jitter frequency and Φ indicates the jitter phase offset. Electrical components, e.g., transmitters or transceivers in data transmission systems, have to satisfy specified requirements with regard to their jitter parameters. One requirement is, e.g., the jitter tolerance. This defines what jitter can be applied to a semiconductor component without the data transmission error rate increasing.
The characteristic value of the jitter transfer coefficient indicates the magnitude of the ratio between the jitter amplitude at the output of the component and the jitter amplitude at the input of the component.
When testing the components with regard to their jitter behavior it is necessary to use very complicated test devices, because the jitter measurements have to be effected with high precision.
In application note 1267 “Frequency Agile Jitter Measurement System” from Agilent Technologies, the section “Jitter transfer measurement setup” describes a test device for measuring the jitter transfer coefficient, in which test device a digital signal generator feeds a predefined or a random data sequence to a semiconductor component to be tested. The clock is likewise generated in the signal generator and a deterministic or statistical jitter signal is modulated onto the clock.
The input clock beset with jitter is fed to a first input of a jitter measuring instrument, on the one hand, and is connected to the clock input of the semiconductor component to be tested, on the other hand. A clock is recovered from the output data stream of the component. This recovered clock is fed into a second input of a jitter measuring instrument.
The jitter measuring instrument compares the input clock with the recovered output clock and from this determines the extent to which the recovered clock still contains the input jitter. Extremely high demands are made of the measurement technology particularly in the jitter measuring instrument and in the signal generator. High-precision testers and measuring instruments are used particularly at high frequencies. These high-precision testers and measuring instruments are very sensitive and expensive. Moreover, the labor for setting and calibrating these testers and measuring instruments is high.